Computer Science
04782026–2028 syllabus

COMPUTER SCIENCE · CHAPTER 3

Hardware

Connect processor architecture, input/output, storage and network devices to system performance.

Full syllabus4 connected sectionsSyllabus-aligned guide

LEARNING OBJECTIVES

What you will be able to do

  • describe CPU components and the fetch–decode–execute cycle
  • explain input, output and sensor choices
  • compare primary and secondary storage
  • identify network hardware and device addressing

AT A GLANCE

Syllabus0478Coverage2026–2028Sections4LevelFull syllabus

INTRODUCTION · THE BIG IDEA

Connect processor architecture, input/output, storage and network devices to system performance.

Hardware is the physical part of a computer system. The processor repeatedly fetches and executes instructions, while memory, storage and peripherals supply data and preserve results.

Device suitability depends on the data source, required output, environment, capacity, speed, durability and cost.

01

SECTION 01

CPU architecture and the FDE cycle

Core concept

The control unit coordinates operations; the arithmetic logic unit performs arithmetic and logic; registers provide very fast temporary storage. Buses carry addresses, data and control signals.

In the fetch–decode–execute (FDE) cycle, the program counter holds the next instruction address, the memory address register sends it, memory returns the instruction through the memory data register, and the current instruction register holds it for decoding and execution. The accumulator stores intermediate results.

Higher clock speed, more cores and larger cache can improve performance, but software parallelism, heat and other bottlenecks limit gains. Embedded systems are dedicated computers inside larger devices.

ORIGINAL STUDY DIAGRAMFetch–decode–execute
1Copy PC to MAR
2Fetch instruction to MDR/CIR
3Increment PC
4Control unit decodes
5CPU executes and stores result
Original worked example

Tracking one instruction fetch

  1. The PC contains address 240.
  2. 240 is copied to the MAR and the instruction at that address returns through the data bus to the MDR, then CIR.
  3. The PC increments to 241 before the instruction is decoded.

Answer: The CIR holds the current instruction while the PC is already ready with the next instruction address, 241.

02

SECTION 02

Input, output and sensors

Core concept

Input devices include keyboard, pointing devices, microphones, cameras, scanners and readers such as barcode, QR, magnetic stripe, chip, RFID and optical character or mark recognition. Choose using accuracy, speed, environment and data type.

Output devices include displays, projectors, printers, speakers and actuators. A sensor measures a physical quantity such as temperature, pressure, light or moisture; an analogue signal may need analogue-to-digital conversion before processing. Actuators turn digital decisions into physical action.

Direct-data capture
TechnologyReadsTypical strength
OCRprinted characterseditable text without retyping
OMRfilled positionsfast standard-form marking
RFIDradio tagno line of sight required
Barcode/QRprinted codecheap and widely supported
03

SECTION 03

Primary memory and secondary storage

Core concept

ROM is non-volatile and stores instructions such as firmware. RAM is read/write and volatile. Cache is smaller and faster than RAM and stores frequently needed instructions and data near the CPU.

Magnetic storage offers high capacity at low cost but has moving parts. Optical media are portable and useful for distribution or archive but slower and lower capacity. Solid-state storage has no moving parts, so it is fast, quiet and robust but can cost more per unit and has limited write endurance.

Virtual memory uses secondary storage when RAM is insufficient; it prevents immediate failure but is much slower and can cause thrashing.

Storage choice
TypeStrengthLimitation
Magneticlarge capacity and low costmoving parts
Opticalportable physical distributionlow speed/capacity
Solid statefast and robustcost and write endurance
04

SECTION 04

Network hardware and addressing

Core concept

A network interface controller connects a device. Switches forward frames within a local network using MAC addresses; routers move packets between networks using IP addresses. Wireless access points provide radio connection and modems convert signals for a communication link.

MAC addresses are hardware identifiers used locally; IP addresses identify network locations and may be IPv4 or IPv6, static or dynamic. A device can have both. A router commonly assigns private addresses through DHCP and uses network address translation for internet access.

Device roles
DeviceMain role
Switchconnect devices inside a LAN
Routerconnect networks and select packet routes
Wireless access pointconnect wireless clients to a network
NICprovide a device's network interface

QUICK CHAPTER SUMMARY

The ideas to carry forward

  • The CPU coordinates and executes instructions through the FDE cycle.
  • Input and output choices must match data and environment.
  • Memory and storage trade speed, capacity, persistence and cost.
  • Switches serve local networks; routers connect networks.

QUICK REVISION CHECKLIST

Can you do each of these without your notes?

  • describe CPU components and the fetch–decode–execute cycle
  • explain input, output and sensor choices
  • compare primary and secondary storage
  • identify network hardware and device addressing